Error -1073807252 during a VISA read.

 
I'm performing a VISA read operation after a write and if I run a small script I get a warning 1073676294, VISA:  (Hex 0x3FFF0006) The number of bytes transferred is equal to the requested input count. More data might be available.
 
When I run a larger script I get the error VISA:  (Hex 0xBFFF006C) An overrun error occurred during transfer. A character was not read from the hardware before the next character arrived.
 
I need to run very large scripts in my application so hopefully there is a solution using the VISA functions.
 
Jeff

The solution to this is to use hardware or software flow control. This
will prevent the instrument or what ever you're talking to from sending
additional data until you've read everything from the buffer. Another
solution is to read from the buffer faster. You can do that by
decreasing delays in loops that are reading from that serial port. 

I hope this was helpful. If you need any clarification, just let me know.

Regards,
Matt S.

Thanks Matt for the reply and I'll make note of the solutions proposed.

 

I found the problem and it was not in my labview program but rather it was a fault message in the response from the hardware that labview is interfacing with.  The response from the hardware was in a continuous loop therefore the read buffer could not keep up.

 

Thanks again,

Jeff

 

Jefska have you resolve your problem because I've got exactly the same?
I'm currently using labview RT 8.2 on PXI-8196.  I receive a status via RS232. I 'm using the byte at port.vi  and when there are 156 bytes at port I read it to get them. Sometimes the count return is 12 or 18 or anything...
My application worked fine. Then I 've changed my host computer and installed LV RT 8.2 on it. Since that , I've got an intermittent error -1073807252  VISA (hex 0xBFFF00EC).  I've made a lot of tests to solve it but I failed. I don't understand where it could be from!!
VISA read.vi is in asynchronous mode  -----      My port settings are : Com1   9600 baud   8 data bits  no parity   1 stop bit   no flow control. 
I've seen in LV RT 8.2, there is a new advanced tab in MAX under 8196 / COM1 where I can select FIFO buffer. I've tried with or without it's the same problem. 
As I said before I 've tried to correct the error   but I didn't succed in!!!!
 
So any Idea???
 
 
 Message Edité par julesjay le 01-08-2007  10:47 AM

It?s been quite awhile since this was an issue for me.  I assume you tried what Matt suggested.  The only thing that comes to mind is to take the return count from the VISA write and multiply that by some factor as an input to a Timeout(Wait function) before the VISA read and increase the multiplier if the read buffer does not get the entire byte count.  Also the Basic Serial Write and Read.vi in LV examples might be of help.

 

ATB,

Jefska

 

I've already tried to increase  of write, and wait a time before read but it still doesn't work. 
As I use a byte at port vi, I think there is no need to wait because these byte a ready to be read.
 
 

Brian, 
My former computer runs LV 8.0.1. So I've upgrade it on LV 8.2 and the same error occured. I've donwgrade it to 8.0.1 again and there isn't error anymore. Then I've donwgrade NI-SERIAL RT 2.5.6 on PXI chassis and the error occured. I've re-installed NI-SERIAL RT 3.0 and no error. 
I think that maybe NI-SERIAL RT is in cause.  
On the new computer I've just uninstall NI-SERIAL 3.1 form my 8.2 version and replace it by  NI-SERIAL 3.0..... Wait and see....
 
I'll give you the result tomorrow!!
 
Thanks.

So after several hours of tests, It's still working wihtout error!!!!  
As a conclusion =>  NI-SERIAL RT 3.1  is bugged  (in my case!!))
 
 

Hi julesjay, 

 

So you?re getting the error when you have either NI-Serial RT ver. 2.5.6 or 3.1, but not with ver. 3.0, correct?  And also just as clarification, if you use the DMA FIFO between FPGA and RT on the system with NI-Serial RT ver. 2.5.6 or 3.1 you do not get the VISA read error?  From what I have seen this has not been a documented bug at this point.  You also mentioned that the error occurs intermittently.  How frequently did it occur and did there seem to be any trend along these lines that you could see?  Thanks!

#So you?re getting the error when you have either NI-Serial RT ver. 2.5.6 or 3.1, but not with ver. 3.0#   => ABSOLUTLY
 
#DMA FIFO between FPGA and RT on the system with NI-Serial RT ver. 2.5.6 or 3.1 you do not get the VISA read error#  =>  CORRECT TOO no error!! But I'm not sure that DMA uses NI-Serial RT...
 
#How frequently did it occur#  =>   It's difficult to answer. Apparently It seems to depend of if DMA FIFO is enable or not. And in enable case, it depend of the speed I read /write them.  So DMA FIFO may also depend of Ni-serial as you suggested!!!!  I've tested with DMA disable and there were no error!
 
I Hope It will help you. 
 
julesjay